JK and T flip-flops

by ourcircuits

6 parts

Edge-triggered memory on one shared 1 kHz clock. J and K run at 125 and 250 Hz, so every 8 ms the JK flip-flop walks its entire truth table — two clock edges each of toggle, set, reset and hold. The T flip-flop's input is tied high by a logic constant, so it toggles on every rising edge: the measured output period is exactly 2.000 ms, the classic divide-by-two.